VHDL MCQ Quiz Hub

1. WAIT statement can’t appear under _______ directly.
Architecture
Process
Procedure
Subprogram

2. Which of the following can’t be used in a process when it has any WAIT statement?
IF
CASE
LOOP
Sensitivity list

3. How many forms of WAIT statement are there in VHDL?
1
2
3
4

4. Which of the following is not the correct WAIT statement? a) c) d)
WAIT ON
WAIT WHILE
WAIT FOR
WAIT UNTIL

5. WAIT UNTIL statements cause the process to wait ________
When a signal changes value
Until a condition is true
For a specific time period
When either a signal changes its value or a condition comes true

6. What is the correct syntax for using a WAIT UNTIL statement?
WAIT UNTIL boolean_condition_or_expression;
WAIT UNTIL signal_name;
WAIT UNTIL time_value_or_expression;
WAIT UNTIL boolean_expression time_value;

7. What is the use of WAIT FOR statement?
To stop execution when the condition is false
To stop execution until a signal changes its value
To stop execution for a specific time period
To stop execution until the clock event occurs

8. How to define a WAIT FOR statement?
WAIT FOR signal_name;
WAIT FOR booelan_expression;
WAIT FOR clock_event;
WAIT FOR time_value;

9. Which of the following is the correct use of WAIT ON statement?
To stop execution until a signal changes its value
To stop execution when a signal changes its value
To stop execution when a condition specified is true
To stop execution when a condition specified is false

10. Which of the following is correct syntax for WAIT ON statement?
WAIT ON signal_assignments;
WAIT ON boolean_condition;
WAIT ON signal_list;
WAIT ON time_expression;

11. Which of the following statement uses only 1 signal?
WAIT FOR
WAIT UNTIL
WAIT ON
WAIT UNTIL and WAIT FOR

12. Given that a process has no sensitivity list and has only one WAIT statement which is WAIT FOR statement. How many signals are there to which process is sensitive?
0
1
2
Can’t be determined

13. Which of the following WAIT statement is most useful for implementing a synchronous sequential circuit?
WAIT ON
WAIT FOR
WAIT UNTIL
WAIT TIME

14. What is the deadlock condition in VHDL?
When WAIT statement keeps on waiting forever
When WAIT UNTIL statement uses more than one signal
When WAIT ON statement has only one signal
When WAIT FOR statement doesn’t have any time clause

15. In case of sensitivity list the process suspends at the end of the process and in WAIT statement it suspends ____________
At the beginning
At the end
At the beginning of architecture
Where the WAIT statement is encountered

16. In combinational logic, how many WAIT statements can be used?
0
1
2
3

17. Refer to the code given below, which kind of circuit is implemented? PROCESS BEGIN WAIT on a, b; z <= a AND b; END PROCESS;
Combinational
Synchronous sequential
Asynchronous sequential
State machine

18. In a procedure is called from a process having a sensitivity list, how many wait statements one can use?
3
2
1
0

19. Which of the following is true about WAIT UNTIL statement?
WAIT UNTIL statement is supported by synthesis tools
WAIT UNTIL statement is not supported by synthesis tools
WAIT UNTIL statement is supported in a clocked process only
WAIT UNTIL statement is supported in a combinational process

20. Which of the following is true about WAIT ON statement?
WAIT ON statement is supported by synthesis tools
WAIT ON statement is not supported by synthesis tools
WAIT ON statement is supported in a clocked process only
WAIT ON statement is supported in a combinational process

21. In a procedure, __________ statement is not supported.
WAIT UNTIL
WAIT ON
WAIT FOR
WAIT FOR and unconditional WAIT

22. What kind of circuit is implemented by the following architecture? ARCHITECTURE my_arch OF my_design IS BEGIN PROCESS BEGIN WAIT ON clk; IF(clk = ‘1’) THEN y <= x; END IF; END PROCESS; END my_arch;
D flip flop
Inverter
OR gate
Shift register

23. WAIT FOR statement is useful only for _________
Synthesis
Simulation
Gate level implementation
Optimization

24. A user wants to assign a signal after a wait of 20 ns. The process used has a sensitivity list. What is the possible way to achieve this?
By using WAIT FOR statement
By using AFTER clause c) d)
By using a separate process
By using WAIT ON statement

25. Since WAIT statement can’t be synthesized many times, how a clock event can be detected then?
By using IF(clk = ‘1’)
By using ‘EVENT keyword
By using a CASE statement
By using a LOOP

26. Which of the following can be used to make the process wait indefinitely?
WAIT FOR indefinite ns;
WAIT UNTIL false;
WAIT;
WAIT UNTIL true;