In segmentation, each address is specified by _______
1.a segment number & offset
2.an offset & value
3.a value & segment number
4.a key & value
Posted Date:-2022-03-26 16:20:08
Logical memory is broken into blocks of the same size called _________
1.frames
2.pages
3. backing store
4.None of the mentioned
Posted Date:-2022-03-26 16:08:13
The relocation register helps in _______
1.providing more address space to processes
2.a different address space to processes
3. to protect the address spaces of processes
4. none of the mentioned
Posted Date:-2022-03-25 18:22:09
To obtain better memory utilization, dynamic loading is used. With dynamic loading, a routine is not loaded until it is called. For implementing dynamic loading _______
1. special support from hardware is required
2.special support from operating system is essential
3.special support from both hardware and operating system is essential
4.user programs can implement dynamic loading without any special support from hardware or operating system
Posted Date:-2022-03-26 16:18:41
A multilevel page table is preferred in comparison to a single level page table for translating virtual address to physical address because ________
1.it reduces the memory access time to read or write a memory location
2. it helps to reduce the size of page table needed to implement the virtual address space of a process
3.it is required by the translation lookaside buffer
4.it helps to reduce the number of page faults in page replacement algorithms
Posted Date:-2022-03-26 16:25:13
An ______ uniquely identifies processes and is used to provide address space protection for that process.
1.address space locator
2.address space identifier
3.address process identifier
4.None of the mentioned
Posted Date:-2022-03-26 16:15:14
Consider a computer with 8 Mbytes of main memory and a 128K cache. The cache block size is 4 K. It uses a direct mapping scheme for cache management. How many different main memory blocks can map onto a given physical cache block?
1.2048
2.256
3.64
4.8
Posted Date:-2022-03-26 16:24:46
Each entry in a segment table has a _______
1.segment base
2. segment peak
3.segment value
4.None of the mentioned
Posted Date:-2022-03-26 16:20:57
Each entry in a translation lookaside buffer (TLB) consists of ______
1.key
2.value
3.bit value
4.Constant variables
Posted Date:-2022-03-26 16:14:21
Every address generated by the CPU is divided into two parts. They are _______
1.frame bit & page number
2. page number & page offset
3. page offset & frame bit
4. frame offset & page offset
Posted Date:-2022-03-26 16:08:37
For every process there is a __________
1.page table
2.copy of page table
3.pointer to page table
4.All of the Mentioned
Posted Date:-2022-03-26 16:13:14
For larger page tables, they are kept in main memory and a ____ points to the page table.
1. page table base register
2.page table base pointer
3. page table register pointer
4.page table base
Posted Date:-2022-03-26 16:12:48
If a page number is not found in the TLB, then it is known as a ______
1.TLB miss
2.Buffer miss
3.TLB hit
4.All of the Mentioned
Posted Date:-2022-03-26 16:14:48
If the offset is legal _______
1. it is used as a physical memory address itself
2.it is subtracted from the segment base to produce the physical memory address
3. it is added to the segment base to produce the physical memory address
4.None of the mentioned
Posted Date:-2022-03-26 16:22:39
If the size of logical address space is 2 to the power of m, and a page size is 2 to the power of n addressing units, then the high order _____ bits of a logical address designate the page number, and the ____ low order bits designate the page offset.
1.m, n
2.n, m
3.m – n, m
4.m – n, n
Posted Date:-2022-03-26 16:10:21
If there are 32 segments, each of size 1Kb, then the logical address should have ______
1.13 bits
2. 14 bits
3.15 bits
4.16 bits
Posted Date:-2022-03-26 16:24:20
Illegal addresses are trapped using the _____ bit.
1.error
2.protection
3. valid – invalid
4.Access
Posted Date:-2022-03-26 16:17:18
In a paged memory, the page hit ratio is 0.35. The required to access a page in secondary memory is equal to 100 ns. The time required to access a page in primary memory is 10 ns. The average time required to access a page is?
1.3.0 ns
2.68.0 ns
3.68.5 ns
4.78.5 ns
Posted Date:-2022-03-26 16:18:14
In contiguous memory allocation ______
1. each process is contained in a single contiguous section of memory
2. all processes are contained in a single contiguous section of memory
3.the memory space is contiguous
4.None of the mentioned
Posted Date:-2022-03-25 18:21:32
In fixed size partition, the degree of multiprogramming is bounded by _______
1.the number of partitions
2.the CPU utilization
3.the memory size
4.All of the Mentioned
Posted Date:-2022-03-25 18:36:01
In paged memory systems, if the page size is increased, then the internal fragmentation generally _____
1.becomes less
2.becomes more
3. remains constant
4.None of the mentioned
Posted Date:-2022-03-26 16:19:15
In paging the user provides only ________ which is partitioned by the hardware into ________ and ______
1. one address, page number, offset
2.one offset, page number, address
3.page number, offset, address
4.None of the mentioned
Posted Date:-2022-03-26 16:20:35
Memory protection in a paged environment is accomplished by _______
1.protection algorithm with each page
2.restricted access rights to users
3.restriction on page visibility
4.protection bit with each page
Posted Date:-2022-03-26 16:16:14
Operating System maintains the page table for _______
1.each process
2.each thread
3.each instruction
4.each address
Posted Date:-2022-03-25 18:14:54
Paging increases the ______ time.
1.waiting
2.execution
3.context – switch
4.All of the Mentioned
Posted Date:-2022-03-26 16:11:26
Physical memory is broken into fixed-sized blocks called _____
1.frames
2.pages
3. backing store
4.None of the mentioned
Posted Date:-2022-03-26 16:07:46
Program always deals with _________
1. logical address
2.absolute address
3.physical address
4.Relative address
Posted Date:-2022-03-25 18:13:43
Smaller page tables are implemented as a set of _______
1.queues
2. stacks
3.counters
4.registers
Posted Date:-2022-03-26 16:11:52
The address of a page table in memory is pointed by ______
1.stack pointer
2.page table base register
3.page register
4.program counter
Posted Date:-2022-03-25 18:13:21
The first fit, best fit and worst fit are strategies to select a ______
1.process from a queue to put in memory
2.processor to run the next process
3.free hole from a set of available holes
4.All of the Mentioned
Posted Date:-2022-03-25 18:37:17
The offset ‘d’ of the logical address must be ______
1. greater than segment limit
2.between 0 and segment limit
3.between 0 and the segment number
4.greater than the segment number
Posted Date:-2022-03-26 16:22:14
The page table contains _______
1.base address of each page in physical memory
2.page offset
3.page size
4.None of the mentioned
Posted Date:-2022-03-25 18:14:10
The page table registers should be built with _______
1.very low speed logic
2.very high speed logic
3.a large memory space
4.None of the mentioned
Posted Date:-2022-03-26 16:12:14
The percentage of times a page number is found in the TLB is known as ______
1.miss ratio
2.hit ratio
3.miss percent
4.None of the mentioned
Posted Date:-2022-03-26 16:15:43
The protection bit is 0/1 based on _____
1.write only
2.read only
3.read – write
4.None of the mentioned
Posted Date:-2022-03-26 16:23:56
The segment base contains the ______
1. starting logical address of the process
2. starting physical address of the segment in memory
3.segment length
4.None of the mentioned
Posted Date:-2022-03-26 16:21:25
The segment limit contains the _______
1.starting logical address of the process
2.starting physical address of the segment in memory
3.segment length
4.None of the mentioned
Posted Date:-2022-03-26 16:21:49
The size of a page is typically _________
1.varied
2. power of 2
3.power of 4
4.None of the mentioned
Posted Date:-2022-03-26 16:09:58
The ___ is used as an index into the page table.
1.frame bit
2.page number
3.page offset
4. frame offset & page offset
Posted Date:-2022-03-26 16:09:07
The _____ table contains the base address of each page in physical memory.
1. process
2.memory
3. page
4.frame
Posted Date:-2022-03-26 16:09:34
Time taken in memory access through PTBR is ______
1.extended by a factor of 3
2.extended by a factor of 2
3.slowed by a factor of 3
4.slowed by a factor of 2
Posted Date:-2022-03-26 16:13:42
Transient operating system code is code that ______
1.is not easily accessible
2.comes and goes as needed
3.stays in the memory always
4.never enters the memory space
Posted Date:-2022-03-25 18:34:20
What is compaction?
1.a technique for overcoming internal fragmentation
2. a paging technique
3.a technique for overcoming external fragmentation
4. a technique for overcoming fatal error
Posted Date:-2022-03-25 18:14:32
What is the operating system?
1. in the low memory
2. in the high memory
3.either low or high memory (depending on the location of interrupt vector)
4.None of the mentioned
Posted Date:-2022-03-25 18:20:38
When memory is divided into several fixed sized partitions, each partition may contain ________
1. exactly one process
2.at least one process
3.multiple processes at once
4.None of the mentioned
Posted Date:-2022-03-25 18:35:36
When the entries in the segment tables of two different processes point to the same physical location ______
1. the segments are invalid
2. the processes get blocked
3.segments are shared
4.All of the Mentioned
Posted Date:-2022-03-26 16:23:08
When the valid – invalid bit is set to valid, it means that the associated page ______
1.is in the TLB
2.has data in it
3. is in the process’s logical address space
4.is the system’s physical address space
Posted Date:-2022-03-26 16:16:55
When there is a large logical address space, the best way of paging would be ______
1. not to page
2.a two level paging algorithm
3. the page table itself
4.all of the mentioned
Posted Date:-2022-03-26 16:17:45
With paging there is no ________ fragmentation.
1.internal
2.external
3.either type of
4.None of the mentioned
Posted Date:-2022-03-26 16:10:47
With relocation and limit registers, each logical address must be _______ the limit register.
1. less than
2.equal to
3.greater than
4.None of the mentioned
Posted Date:-2022-03-25 18:28:26